An ultralow power CMOS/SIMOX programmable counter LSI.

Yuichi Kado T. Ohno Mitsuru Harada K. Deguchi T. Tsuchiya

Published in: IEEE J. Solid State Circuits (1997)

Keyphrases

power consumption
low cost
low power
single chip
latent semantic indexing
general purpose
chip design
high speed
power management
data sets
neural network
circuit design
least squares
power dissipation
signal processor