VLSI Implementation of a Soft Bit-flipping Decoder for PG-LDPC Codes.

Junho Cho Jonghong Kim Hyunwoo Ji Wonyong Sung

Published in: ISCAS (2009)

Keyphrases

vlsi implementation
ldpc codes
decoding algorithm
low density parity check
vlsi architecture
noise model
non binary
fir filters
message passing
filter bank
error correction
rate allocation
image processing
video sequences
belief propagation
associative memory