An automated technique to generate relocatable partial bitstreams for Xilinx FPGAs.

Roel Oomen Tuan D. A. Nguyen Akash Kumar Henk Corporaal

Published in: FPL (2015)

Keyphrases

field programmable gate array
hardware implementation
fpga implementation
semi automated
fully automated
fine grain
automatically generating
automatically generate
bitstream
computer aided
high speed
information systems
embedded systems
partial information
semi automatic
low cost
image processing