Low-Power FPGA Implementation of Convolution Neural Network Accelerator for Pulse Waveform Classification.
Chuanglu ChenZhiqiang LiYitao ZhangShaolong ZhangJiena HouHaiying ZhangPublished in: Algorithms (2020)
Keyphrases
- low power
- neural network
- high speed
- power consumption
- fpga implementation
- low cost
- pattern recognition
- single chip
- wireless transmission
- high power
- hardware implementation
- image processing
- real time
- digital signal processing
- vlsi architecture
- mixed signal
- machine learning
- wireless networks
- frequency domain
- low power consumption
- low density parity check