SMART Paths for Latency Reduction in ReRAM Processing-In-Memory Architecture for CNN Inference.
Sho KoShimeng YuPublished in: CoRR (2020)
Keyphrases
- processing elements
- memory management
- real time
- inference engine
- low latency
- associative memory
- distributed processing
- heterogeneous computing
- management system
- parallel architecture
- compute intensive
- computational power
- random access
- memory requirements
- processing units
- software architecture
- data processing
- digital signal processors
- memory usage
- main memory
- information processing
- bayesian networks
- reduction method
- cellular neural networks
- probabilistic inference
- belief networks
- parallel processing
- multithreading
- memory hierarchy
- data structure