Resource and Performance Evaluations of Fixed Point QRD-RLS Systolic Array through FPGA Implementation.
Yoshiaki YokoyamaMinseok KimHiroyuki AraiPublished in: IEICE Trans. Commun. (2008)
Keyphrases
- fixed point
- fpga implementation
- systolic array
- hardware implementation
- parallel architecture
- reconfigurable architecture
- data flow
- sufficient conditions
- belief propagation
- least squares
- efficient implementation
- image processing algorithms
- field programmable gate array
- dynamical systems
- resource allocation
- floating point
- markov random field
- transfer function