A 700mV low power pipeline ADC using a novel common mode feedback circuit and offset cancellation technique.
Guanglei AnChriswell HutchensRobert L. RennakerPublished in: MWSCAS (2012)
Keyphrases
- low power
- high speed
- logic circuits
- single chip
- cmos technology
- wide dynamic range
- power reduction
- power consumption
- low cost
- gate array
- power dissipation
- vlsi circuits
- delay insensitive
- high power
- mixed signal
- image sensor
- sigma delta
- wireless transmission
- low power consumption
- vlsi architecture
- nm technology
- real time
- digital signal processing
- analog to digital converter
- motion vectors
- low voltage
- image processing