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A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder.

Masakazu SuzuokiKen KutaragiToshiyuki HiroiHidetaka MagoshiShin'ichi OkamotoMasaaki OkaAkio OhbaYasuyuki YamamotoMakoto FuruhashiMasayoshi TanakaTeiji YutakaToyoshi OkadaMasato NagamatsuYukihiro UrakawaMasami FunyuAtsushi KunimatsuHarutaka GotoKazuhiro HashimotoNobuhiro IdeHiroaki MurakamiYukio OhtaguroAkira Aono
Published in: IEEE J. Solid State Circuits (1999)
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