Cycle-efficient lineary feedback shift register implementation on word-based micro-architecture.
Jui-Chieh LinSao-Jie ChenYu Hen HuPublished in: ICASSP (2012)
Keyphrases
- hardware implementation
- efficient implementation
- computation intensive
- layered architecture
- hardware architecture
- general purpose
- cost effective
- real time
- design considerations
- wordnet
- co occurrence
- shift register
- image processing
- client server architecture
- vlsi implementation
- dedicated hardware
- software implementation
- fpga technology
- core components
- peer to peer
- distributed systems
- high speed
- relevance feedback
- management system
- keywords
- real world