SpiderWeb - High Performance FPGA NoC.
Martin LanghammerGregg BaecklerSergey GribokPublished in: IPDPS Workshops (2020)
Keyphrases
- low power consumption
- network on chip
- multi processor
- low cost
- real time image processing
- field programmable gate array
- high speed
- real time
- cost effective
- high reliability
- verilog hdl
- distributed memory
- hardware design
- hardware implementation
- signal processing
- hardware architecture
- software implementation
- embedded systems
- routing algorithm
- parallel architecture
- program execution
- low power
- reconfigurable hardware
- systolic array
- pipelined architecture