A CMOS architecture allowing parallel DNA comparison for on-chip assembly.
Yuanqi HuYan LiuChristofer ToumazouPantelis GeorgiouPublished in: ISCAS (2012)
Keyphrases
- analog vlsi
- cmos image sensor
- high speed
- cmos technology
- level parallelism
- nm technology
- parallel processing
- low cost
- power consumption
- parallel architecture
- single chip
- master slave
- distributed processing
- low power
- circuit design
- analog to digital converter
- multithreading
- floating point arithmetic
- multi processor
- vlsi implementation
- mixed signal
- image sensor
- processor array
- management system
- multi core processors
- printed circuit boards
- low voltage
- design considerations
- dynamic range
- parallel implementation
- dna computing
- processing units
- reconfigurable hardware
- random access memory
- shared memory
- memory subsystem
- dna sequences
- associative memory