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On the IC architecture and design of a 2 µm CMOS 8 MIPS digital signal processor with parallel processing capability: The PCB5010/5011.

Frans J. van WijkFrank P. WeltenJef L. van MeerbergenJan StoterJos A. HuiskenAntoine DelaruelleKarel E. van EerdewijkJosef SchmidJan H. Wittek
Published in: ICASSP (1986)
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