Automatic Energy-Minimized HW/SW Partitioning for FPGA-Accelerated MPSoCs.
Gereon FührSeyit Halil HamurcuDiego PalaThomas GrassRainer LeupersGerd AscheidJuan Fernando EussePublished in: IEEE Embed. Syst. Lett. (2019)
Keyphrases
- hw sw
- field programmable gate array
- hardware software
- design methodology
- embedded systems
- hardware implementation
- hardware software partitioning
- hardware software co design
- hardware and software
- real time
- energy consumption
- low cost
- cloud computing
- information systems
- energy efficiency
- signal processing
- parallel computing
- general purpose
- wireless sensor networks
- image processing