Fast parallel simulation of a manycore architecture with a flit-level on-chip network model.

Shin-Haeng Kang Jintaek Kang Soonhoi Ha

Published in: SAMOS (2018)

Keyphrases

network model
level parallelism
multithreading
master slave
neural network
immune algorithm
vlsi implementation
low cost

analog vlsi
simulation environment
parallel computers
packet switched
floating point arithmetic
real time
processor array
parallel architectures

distributed memory
parallel implementation
host computer
processing elements
parallel architecture
cmos technology
massively parallel

shared memory
rbf neural network
chip design
cmos image sensor
parallel processing
high speed
software engineering