Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms.

Chenjie Yu Peter Petrov

Published in: DAC (2010)

Keyphrases

memory bandwidth
level parallelism
memory access
processing power
cache misses
floating point
parallel programming
processing units
commodity hardware
main memory
hardware and software
data access
computing power
database
instruction set
multiprocessor systems
parallel execution
embedded systems
parallel algorithm