A 1.8 - 6.3 GHz Quadrature Ring VCO-based Fast-settling PLL for Wireline I/O in 55nm CMOS.
Javed S. GaggaturPublished in: VLSI Design (2021)
Keyphrases
- high speed
- silicon on insulator
- cmos technology
- power consumption
- ibm power processor
- nm technology
- metal oxide semiconductor
- low power
- input output
- low cost
- clock frequency
- wireless networks
- main memory
- power management
- frequency band
- fourier transform
- analog vlsi
- rotation invariant
- instruction set
- low voltage
- delay insensitive
- error resilience
- cmos image sensor
- parallel processing
- circuit design
- image sensor
- integrated circuit
- focal plane
- storage systems
- external memory