Implement 32-bit RISC-V Architecture Processor using Verilog HDL.
Jin-Yang LaiChiung-An ChenShih-Lun ChenChun-Yu SuPublished in: ISPACS (2021)
Keyphrases
- instruction set
- verilog hdl
- instruction set architecture
- computation intensive
- floating point
- hardware architecture
- xilinx virtex
- application specific
- computer architecture
- multi processor
- software architecture
- processing elements
- memory access
- embedded systems
- parallel architecture
- single processor
- fpga device
- management system
- systolic array
- integer arithmetic
- level parallelism
- parallel processing
- data access
- real time
- parallel computers
- single chip
- computer systems
- hardware implementation