Model checking-based safety verification for railway signal safety protocol-I.
Meng MeiZhongwei XuXi WangYongbing WanPublished in: Int. J. Comput. Appl. Technol. (2013)
Keyphrases
- model checking
- model checker
- temporal logic
- formal verification
- verification method
- automated verification
- formal specification
- formal methods
- finite state
- partial order reduction
- temporal properties
- symbolic model checking
- finite state machines
- reachability analysis
- pspace complete
- concurrent systems
- transition systems
- asynchronous circuits
- reactive systems
- formal analysis
- description language
- bounded model checking
- process algebra
- timed automata
- artifact centric
- computation tree logic
- planning domains