A 1.4mW 8b 350MS/s loop-unrolled SAR ADC with background offset calibration in 40nm CMOS.
Kareem RagabNan SunPublished in: ESSCIRC (2016)
Keyphrases
- power consumption
- power supply
- hd video
- nm technology
- cmos technology
- low power
- analog to digital converter
- camera calibration
- high speed
- high definition
- silicon on insulator
- low cost
- synthetic aperture radar
- camera parameters
- metal oxide semiconductor
- parameter estimation
- circuit design
- single chip
- analog vlsi
- image reconstruction
- calibration method
- sar images
- multi view