Low Power and Area Efficient Max-log -MAP Decoder.

Kalpana Eluri B. Yamuna Karthi Balasubramanian Deepak Mishra

Published in: ICACCI (2018)

Keyphrases

low power
low cost
high speed
power consumption
single chip
digital signal processing
low power consumption
vlsi circuits
high power
real time
error concealment
vlsi architecture
wireless transmission
low density parity check