VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies.
Preetham LakshmikanthanAdrian NunezPublished in: SIGARCH Comput. Archit. News (2007)
Keyphrases
- high speed
- vlsi circuits
- power dissipation
- circuit design
- chip design
- analog vlsi
- power consumption
- low power
- power reduction
- delay insensitive
- low voltage
- cmos technology
- signal processing
- gate array
- real time
- mixed signal
- single chip
- focal plane
- emerging technologies
- low cost
- design considerations
- future development
- web technologies
- information systems