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A High-Speed Low-Power Two-Stage Comparator with Regeneration Enhancement and Through Current Suppression Techniques.
Chia-Wei Pai
Hiroki Ishikuro
Published in:
MWSCAS (2023)
Keyphrases
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low power
high speed
low cost
power consumption
single chip
high power
low power consumption
wireless transmission
image processing
mixed signal
digital signal processing
vlsi circuits
vlsi architecture
real time
image enhancement
cmos technology
gate array