Login / Signup
Low Power Adiabatic Programmable Logic Array with Single Clock Iapdl.
W. J. Yang
Y. Zhou
K. T. Lau
Published in:
J. Circuits Syst. Comput. (2008)
Keyphrases
</>
low power
power consumption
high speed
low cost
high power
single chip
digital signal processing
vlsi circuits
wireless transmission
real time
image sensor
logic circuits
mixed signal
signal processor
low power consumption
delay insensitive
energy dissipation
gate array