A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time ΣΔ ADC for a Digital Closed-Loop Class-D Amplifier.
Achille DonidaRemy CellierAngelo NagariPiero MalcovatiAndrea BaschirottoPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
- dynamic range
- closed loop
- wide dynamic range
- cmos image sensor
- open loop
- high dynamic range
- low power
- image sensor
- control system
- power consumption
- control scheme
- control law
- feedback control
- transfer function
- analog to digital converter
- spatially varying
- signal to noise ratio
- pid controller
- high speed
- metal oxide semiconductor
- single chip
- cmos technology
- image analysis
- computer vision
- optimal control
- particle swarm optimization
- focal plane
- fuzzy logic