A new diagonal storage for efficient implementation of sparse matrix-vector multiplication on graphics processing unit.
Guixia HeQi ChenJiaquan GaoPublished in: Concurr. Comput. Pract. Exp. (2021)
Keyphrases
- sparse matrix
- efficient implementation
- graphics processing units
- floating point
- integral histogram
- highly parallel
- graphics hardware
- gpu implementation
- parallel computation
- parallel architectures
- fixed point
- general purpose
- hardware implementation
- compute unified device architecture
- random projections
- parallel programming
- arithmetic operations
- rows and columns