Design of a 1.5 GHz Low jitter DCO Ring in 28 nm CMOS Process.

Pierre Bisiaux Elena Blokhina Eugene Koskin Teerachot Siriburanon Dimitri Galayko

Published in: ECCTD (2020)

Keyphrases

case study
multiresolution
high speed
computer aided
user interface
evolutionary algorithm
wireless sensor networks
building blocks
design process
packet loss