FPGA-based parallel hardware architecture for SIFT algorithm.
J. Q. PengY. H. LiuC. Y. LyuY. H. LiW. G. ZhouK. FanPublished in: RCAR (2016)
Keyphrases
- hardware design
- hardware implementation
- hardware architecture
- dynamic programming
- times faster
- cost function
- k means
- optimal solution
- detection algorithm
- image matching
- np hard
- computational complexity
- similarity measure
- image processing algorithms
- optimization algorithm
- neural network
- segmentation algorithm
- theoretical analysis
- expectation maximization
- input data
- search space
- computationally efficient
- linear programming
- computational cost
- preprocessing
- matching algorithm
- object recognition
- objective function
- multiscale
- image processing
- learning algorithm
- real time