FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding.
Moez KthiriHassen LoukilAhmed Ben AtitallahPatrice KadionikDominique DalletNouri MasmoudiPublished in: J. Signal Process. Syst. (2012)
Keyphrases
- motion estimation
- avc video coding
- hardware architecture
- hardware implementation
- motion vectors
- rate control
- video sequences
- motion compensated
- video coding
- intra prediction
- coding efficiency
- motion compensation
- image sequences
- parallel processing
- optical flow
- rate distortion
- bit rate
- high speed
- video compression
- computational complexity
- computer vision
- motion field
- image data
- reference frame
- high resolution
- multiresolution