Optimal wire ordering and spacing in low power semiconductor design.

Peter Gritzmann Michael Ritter Paul Zuber

Published in: Math. Program. (2010)

Keyphrases

low power
single chip
high speed
power consumption
low power consumption
low cost
logic circuits
vlsi architecture
digital signal processing
nm technology
ultra low power
gate array
power dissipation
real time
power reduction
mixed signal
wireless transmission
delay insensitive
cmos technology
image sensor