An open-loop 10GHz 8-phase clock generator in 65nm CMOS.
Xiaochen YangJin LiuPublished in: CICC (2011)
Keyphrases
- open loop
- high speed
- closed loop
- power consumption
- clock gating
- control system
- low power
- feedback control
- nm technology
- cmos technology
- inverted pendulum
- control law
- control scheme
- real time
- power reduction
- silicon on insulator
- stability analysis
- clock frequency
- control strategy
- lagrange multipliers
- expert systems
- optimal solution