Automatic generation of assumptions for modular verification of software specifications.
Claudio de la RivaJavier TuyaPublished in: J. Syst. Softw. (2006)
Keyphrases
- formal verification
- written in natural language
- model checker
- model checking
- automated verification
- formal methods
- asynchronous circuits
- software systems
- control flow
- computer systems
- software design
- automatically generate
- software development
- software architecture
- software tools
- bounded model checking
- reactive systems
- highly modular
- software projects
- functional requirements
- software platform
- software maintenance
- user interface
- protocol specification
- control system
- personal computer
- software engineering
- source code
- commercial software
- finite state machines
- software packages
- software evolution
- data flow
- software package
- embedded systems
- software quality
- face verification
- high level
- formal specification