Scalable and efficient implementation of correlation power analysis using graphics processing units (GPUs).
Tushar SwamyNeel ShahPei LuoYunsi FeiDavid R. KaeliPublished in: HASP@ISCA (2014)
Keyphrases
- efficient implementation
- graphics processing units
- power analysis
- commodity hardware
- countermeasures
- differential power analysis
- smart card
- gpu implementation
- highly parallel
- graphics hardware
- map reduce
- parallel computation
- parallel architectures
- active set
- parallel programming
- general purpose
- graphics processors
- processing units
- elliptic curve
- compute unified device architecture
- s box
- fault tolerance
- peer to peer