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A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs.
Md. Nazrul Islam Mondal
Kohan Sai
Koji Nakano
Yasuaki Ito
Published in:
CANDAR (2013)
Keyphrases
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embedded systems
high speed
smart camera
systolic array
embedded processors
digital signal processing
digital signal
signal processing
parallel architectures
lightweight
hardware implementation
block size
field programmable gate array
digital signal processor
arithmetic operations