A Power-and-Area Efficient 10 × 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation.
Joon-Yeong LeeKwangseok HanTaehun YoonTaeho KimSangeun LeeJeong-Sup LeeJinho ParkHyeon-Min BaePublished in: IEEE J. Solid State Circuits (2016)