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CMOS Circuits Based on a Stacked Structure Using Silicone-Resin as Dielectric Layers.

Kodai KikuchiFanghua PuHiroshi YamauchiMasaaki IizukaMasakazu NakamuraKazuhiro Kudo
Published in: IEICE Trans. Electron. (2011)
Keyphrases
  • high speed
  • delay insensitive
  • analog vlsi
  • vlsi circuits
  • low cost
  • power consumption
  • low power
  • circuit design
  • focal plane
  • neural network
  • parallel processing
  • cmos technology