Improving FPGA Implementations of BLAKE and BLAKE2 Algorithms with Memory Resources.
Jaroslaw SugierPublished in: DepCoS-RELCOMEX (2017)
Keyphrases
- hardware architectures
- times faster
- significant improvement
- software implementation
- memory usage
- efficient implementation
- data sets
- memory footprint
- learning algorithm
- computationally efficient
- theoretical analysis
- machine learning algorithms
- low cost
- hardware implementation
- computational power
- limited resources
- worst case
- computational cost
- matrix multiplication
- dedicated hardware