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Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip.
Chris Bartels
Jos Huisken
Kees Goossens
Patrick Groeneveld
Jef L. van Meerbergen
Published in:
VLSI-SoC (2006)
Keyphrases
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multi processor
network on chip
power dissipation
program execution
shared memory
power consumption
single processor
routing algorithm
multi core processors
interconnection networks
network simulator
low power
parallel architectures
design methodology
distributed memory
ad hoc networks
routing protocol