Design of a low power 7-bit serial counter with energy economized pass-transistor logic (EEPL).
Minkyu SongGeunsoon KangSeongwon KimEuro JoeBongsoon KangPublished in: ICECS (1996)
Keyphrases
- low power
- logic circuits
- single chip
- high speed
- ultra low power
- power consumption
- low cost
- low power consumption
- power dissipation
- vlsi architecture
- gate array
- digital signal processing
- cmos technology
- high power
- energy efficiency
- delay insensitive
- mixed signal
- power reduction
- wireless transmission
- nm technology
- analog to digital converter
- multi channel
- energy dissipation
- signal processor
- design process
- design methodology