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Efficient VLSI architecture for interpolation decoding of hermitian codes.

Shraddha SrivastavaKwankyu LeeEmanuel M. Popovici
Published in: IET Commun. (2014)
Keyphrases
  • vlsi architecture
  • low density parity check
  • decoding algorithm
  • real time
  • low complexity
  • ldpc codes
  • high speed
  • image quality
  • vlsi implementation