Design and verification of the sequential systems automata using temporal logic specifications.
Anatol UrsuGabriela GruitaSergiu ZaporojanPublished in: ED&TC (1997)
Keyphrases
- temporal logic
- model checking
- automated verification
- model checker
- finite state machines
- formal methods
- concurrent systems
- formal verification
- reactive systems
- bounded model checking
- formal specification language
- formal specification
- finite state
- transition systems
- verification method
- asynchronous circuits
- dynamic constraints
- distributed systems
- modal logic
- symbolic model checking
- automata theoretic
- computation tree logic
- knowledge based systems
- linear temporal logic
- description language
- satisfiability problem
- embedded systems
- design requirements
- specification language
- conceptual design
- state space