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A 0.65-1.35 GHz synthesizable all-digital phase locked loop with quantization noise suppressing time-to-digital converter.

Yalçin BalciogluGünhan Dündar
Published in: Turkish J. Electr. Eng. Comput. Sci. (2017)
Keyphrases
  • phase locked loop
  • high voltage
  • data conversion
  • multiscale