Improving execution unit occupancy on SMT-based processors through hardware-aware thread scheduling.
Achille PeternierDanilo AnsaloniDaniele BonettaCesare PautassoWalter BinderPublished in: Future Gener. Comput. Syst. (2014)
Keyphrases
- parallel processors
- parallel execution
- processing units
- multithreading
- list scheduling
- high end
- computational grids
- control unit
- multiprocessor systems
- hardware and software
- heterogeneous computing
- processing elements
- real time
- parallel machines
- scheduling algorithm
- parallel algorithm
- low cost
- scheduling problem
- concurrent execution
- communication delays
- parallel processing
- embedded processors
- parallel architecture
- resource consumption
- computer systems
- parallel computation
- parallel computing
- round robin
- data flow
- hardware implementation
- scheduling decisions
- np hard
- general purpose processors
- deadlock free
- processor core
- embedded systems
- digital computer
- high performance computing
- instruction set
- execution model
- multi core processors
- memory management