Parallel and Multiplex Architecture of AES-CCM Coprocessor Implementation for IEEE 802.15.4.
Bin FengDeyu QiHaiwen HanPublished in: EIDWT (2013)
Keyphrases
- instruction set
- dedicated hardware
- floating point arithmetic
- parallel architecture
- computer architecture
- layered architecture
- floating point
- architectural design
- level parallelism
- massively parallel
- master slave
- parallel computers
- hardware architecture
- distributed processing
- design considerations
- parallel implementation
- efficient implementation
- software architecture
- multi processor
- hardware implementation
- software implementation
- parallel programming
- shared memory
- parallel processing
- management system
- single instruction multiple data
- application specific
- vlsi implementation
- advanced encryption standard
- java platform
- pipelined architecture
- cluster of workstations
- image database