A Low Power Zero-Overhead Self-Timed Division and Square Root Unit Combining a Single-Rail Static Circuit with a Dual-Rail Dynamic Circuit.
Gensoh MatsubaraNobuhiro IdePublished in: ASYNC (1997)
Keyphrases
- low power
- high speed
- square root
- logic circuits
- cmos technology
- power reduction
- power dissipation
- delay insensitive
- vlsi circuits
- low power consumption
- real time
- power consumption
- floating point
- digital signal processing
- gate array
- mixed signal
- euclidean space
- low cost
- pattern recognition
- image sensor
- kalman filtering
- fixed point