An Efficient Design of QCA Full-Adder-Subtractor with Low Power Dissipation.
Ismail GassoumiLamjed TouilAbdellatif MtibaaPublished in: J. Electr. Comput. Eng. (2021)
Keyphrases
- low power
- power dissipation
- cmos technology
- logic circuits
- power consumption
- single chip
- low cost
- high speed
- low power consumption
- vlsi architecture
- energy dissipation
- digital signal processing
- gate array
- power reduction
- vlsi circuits
- mixed signal
- ultra low power
- design process
- power saving
- wireless transmission
- nm technology
- image sensor
- low complexity
- cellular automata