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Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking.

C. S. LimSaman S. AbeysekeraThambipillai SrikanthanS. K. Amarasinghe
Published in: ISCAS (1) (2002)
Keyphrases
  • hardware architecture
  • spread spectrum watermarking
  • hardware implementation
  • digital images
  • image quality
  • parallel algorithm
  • associative memory