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Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins.
Tatsuya Susa
Masahiro Murakawa
Eiichi Takahashi
Tatsumi Furuya
Tetsuya Higuchi
Published in:
HIS (2008)
Keyphrases
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high speed
neural network
integrated circuit
asynchronous circuits
data sets
computer vision
image processing
decision trees
data structure
search algorithm
evolutionary algorithm
upper bound
multi class