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A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips.
Ji-Hoon Lim
Jong-Chan Ha
Won-Young Jung
Yong-Ju Kim
Jae-Kyung Wee
Published in:
IEICE Trans. Electron. (2007)
Keyphrases
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high speed
power consumption
low power
low voltage
design process
cmos technology