Login / Signup
A 2.5- to 3.5-Gb/s Adaptive FIR Equalizer With Continuous-Time Wide-Bandwidth Delay Line in 0.25-$muhbox m$CMOS.
Xiaofeng Lin
Jin Liu
Hoi Lee
Hao Liu
Published in:
IEEE J. Solid State Circuits (2006)
Keyphrases
</>
high speed
low cost
computer simulation
filter bank
dynamical systems
multipath
video streaming
stochastic processes
filter design
wide range
state space
markov chain
network bandwidth
bandwidth allocation
hd video