Process Characterization for Low VTH and Low Power Design.
E. SeebacherGerhard RappitschH. HöllerPublished in: PATMOS (2003)
Keyphrases
- low power
- low power consumption
- single chip
- power consumption
- high speed
- design process
- low cost
- logic circuits
- vlsi architecture
- cmos technology
- digital signal processing
- power reduction
- gate array
- mixed signal
- design methodology
- ultra low power
- real time
- circuit design
- power dissipation
- wireless transmission
- high power
- motion estimation